Ratio-Based Temperature-Sensing Technique Hardened Against Nanometer Process Variations

Process Optimization for Machining of Hardened Steels

Process-voltage-temperature (pvt) Variations and Static Timing Analysis

The major design challenges of ASIC design consist of microscopic issues and macroscopic issues [1]. The microscopic issues are ultra-high speeds, power dissipation, supply rail drop, growing importance of interconnect, noise, crosstalk, reliability, manufacturability and the clock distribution. The macroscopic issues are time to market, design complexity, high levels of abstractions, reuse, IP...

Modelling Temperature-induced Spectral Variations in Chemical Process Monitoring

With a view to ensuring the validity of multivariate calibration models in the presence of temperature variations, a new methodology, individual contribution standardization (ICS), is proposed to correct for temperature-induced spectral variations. The methodology was applied to shortwave NIR spectral data sets recorded at different temperatures. The results showed that ICS can almost eliminate...

Data-Based Models for Global Temperature Variations

This paper presents two data-based models for the measured time series of global annual average tropospheric temperatures. One model is a smoothing spline fit designed to give an optimal separation of signal from noise. The other combines an optimal spline fit to the measured record of CO2 concentration in the atmosphere with a previously reported 70 year cycle in the temperatures. It assumes a...

A new low power high reliability flip-flop robust against process variations

Low scaling technology makes a significant reduction in dimension and supply voltage, and lead to new challenges about power consumption such as increasing nodes sensitivity over radiation-induced soft errors in VLSI circuits. In this area, different design methods have been proposed to low power flip-flops and various research studies have been done to reach a suitable hardened flip-flops. In ...